1. Field of the Invention
The invention relates to a protection method and circuit for preventing unexpected power failure, and more particularly to protection method and circuit for a non-volatile semiconductor storage device for preventing an unexpected power failure.
2. Description of the Related Art
It is well-known that with the rapid development of semiconductor processes and technology, non-volatile semiconductor storage devices, especially flash memory devices (for example, U-disks, various flash memory cards, MP3 and MP4 players, as well as newly-developed solid state devices), have become popular among consumers. Meanwhile, as the firmware and structures of those devices become increasingly complicated, the read/write of data is usually accomplished by means of files instead of direct operations on the address of a storage unit. When the data is operated by means of file read/write, during the operation of the device, the data is usually buffered in a volatile storage device, such as SDRAM. Thus, once an unexpected power failure occurs, the data will be permanently lost. If the lost data includes the firmware of the device or system information such as the map table of the data address, the device will be fatally damaged. A power failure protection design for flash memory devices can ensure the certainty of the operating status of the device and the completeness of the recorded data when an unexpected power failure of the flash memory device occurs. Thus, the in-situ data and device status information may be recovered in a timely fashion after the power supply of the device is restored, thereby preventing the loss of data and/or confusion of the main control unit (MCU). In saying this, flash memory devices operate at lower power consumption and occupy little space, so complicated power failure protection circuits are not suitable for flash memory devices. Therefore, a power failure protection circuit with a simple configuration and low cost is needed to solve the problems caused by unexpected power failures of flash memory devices.
Many of these issues have been addressed in the prior art. Thus, for example, U.S. Pat. No. 6,856,556 (Hajeck) entitled “Storage subsystem with embedded circuit for protecting against anomalies in power signal from host” discloses a storage subsystem, such as a flash memory card, which includes a charge pump that receives a power signal from a host system, and generates a regulated power signal that is provided to the storage subsystem's controller. When the power signal from the host is interrupted, the charge pump additionally acts as a backup power supply such that the storage subsystem can continue to operate temporarily. The storage subsystem also includes a voltage detection circuit that monitors the power signal from the host system to detect anomalies therein. The voltage detection circuit responds to detection of an anomaly by asserting a busy signal to block the host system from performing write operations to the storage subsystem. By asserting the busy signal, the voltage detection circuit substantially ensures that the backup, regulated power provided by the charge pump will be sufficient for the controller to complete all outstanding operations.
U.S. Pat. No. 7,269,755 (Moshayedi et al.) entitled “Solid-state memory device with protection against power failure” discloses a data preservation system for flash memory systems with a host system. The flash memory system receives a host system power supply and energizes an auxiliary energy store therewith and communicates with the host system via an interface bus, upon loss of the host system power supply, the flash memory system actively isolates the connection to the host system power supply and isolates the interface bus and employs the supplemental energy store to continue write operations to flash memory.
The above patents are typical of backup power supplies that store energy from a host system in a backup reservoir and take the stored energy from the backup reservoir in the event of a malfunction in the host's power supply. Typically the backup reservoir is connected directly to the voltage output of the host's power supply since this avoids the need for an invasive connection to the internal circuitry of the host. But it means that the backup reservoir, typically a storage capacitor, will be fully charged to the output voltage of the host power supply. Any fluctuation in the voltage of the host power supply will also affect the voltage of the backup reservoir. As a result, a gradual drop in the voltage of the host power supply that is not sufficiently large to isolate the host power supply and initiate immediate actuation of the backup supply, may mean that there is insufficient voltage in the backup supply if the voltage of the host power supply subsequently drops to a level that initiates actuation of the backup supply.
Yet a further potential drawback of known systems is the need to provide a control signal to the host power supply. For example, in U.S. Pat. No. 6,856,556, the backup power supply has a controller that feeds a ready/busy signal to the host system. The need to provide such a connection is invasive and precludes a completely standalone solution that can be wholly integrated with the memory device and sold as an independent protected unit for direct connection to a host system.
It would therefore be desirable to provide a backup supply that overcomes these drawbacks.